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» Dynamic Voltage and Cache Reconfiguration for Low Power
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CASES
2004
ACM
14 years 23 days ago
Reducing both dynamic and leakage energy consumption for hard real-time systems
While the dynamic voltage scaling (DVS) techniques are efficient in reducing the dynamic energy consumption for the processor, varying voltage alone becomes less effective for t...
Linwei Niu, Gang Quan
DAC
2009
ACM
14 years 8 months ago
Enabling adaptability through elastic clocks
Power and performance benefits of scaling are lost to worst case margins as uncertainty of device characteristics is increasing. Adaptive techniques can dynamically adjust the mar...
Emre Tuncer, Jordi Cortadella, Luciano Lavagno
GLVLSI
2006
IEEE
145views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Leakage current starved domino logic
A new circuit technique based on a single PMOS sleep transistor and a dual threshold voltage CMOS technology is proposed in this paper for simultaneously reducing subthreshold and...
Zhiyu Liu, Volkan Kursun
VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
14 years 7 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
HPCA
2012
IEEE
12 years 2 months ago
Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chi
Lowering supply voltage is one of the most effective techniques for reducing microprocessor power consumption. Unfortunately, at low voltages, chips are very sensitive to process ...
Timothy N. Miller, Xiang Pan, Renji Thomas, Naser ...