157 search results - page 28 / 32 » Dynamic Voltage and Cache Reconfiguration for Low Power |
ISLPED
2009
ACM
14 years 1 months ago
2009
ACM
Increasing power densities and the high cost of low thermal resistance packages and cooling solutions make it impractical to design processors for worst-case temperature scenarios...
NOCS
2009
IEEE
14 years 2 months ago
2009
IEEE
While NoCs are efficient in delivering high throughput point-to-point traffic, their multi-hop operation is too slow for latency sensitive signals. In addition, NoCS are inefficie...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Deploying multiple supply voltages (multi-Vdds) on one chip is an important technique to reduce dynamic power consumption. In this work we present an optimality study for resource...
RTAS
2002
IEEE
14 years 7 days ago
2002
IEEE
Dynamic voltage scaling (DVS) is being increasingly used for power management in embedded systems. Energy is a scarce resource in embedded real-time systems and energy consumption...
OSDI
2002
ACM
14 years 7 months ago
2002
ACM
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...