53 search results - page 1 / 11 » Dynamic instruction schedulers in a 3-dimensional integratio... |
GLVLSI
2006
IEEE
14 years 19 days ago
2006
IEEE
We present the design of high-performance and energy-efficient dynamic instruction schedulers in a 3-Dimensional integration technology. Based on a previous observation that the c...
LCTRTS
2001
Springer
13 years 11 months ago
2001
Springer
Phase-decoupled methods for code generation are the state of the art in compilers for standard processors but generally produce code of poor quality for irregular target architect...
WEBNET
1997
13 years 8 months ago
1997
–The accessibility of the World Wide Web and its flexibility for conveying digital information in various forms makes it a convenient mode of communication for education. In thi...
APCSAC
2005
IEEE
14 years 6 days ago
2005
IEEE
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
MICRO
2010
IEEE
13 years 4 months ago
2010
IEEE
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...