53 search results - page 11 / 11 » Dynamic instruction schedulers in a 3-dimensional integratio... |
DAC
2003
ACM
14 years 7 months ago
2003
ACM
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
CASES
2009
ACM
14 years 1 months ago
2009
ACM
As technology scales and the energy of computation continually approaches thermal equilibrium [1,2], parameter variations and noise levels will lead to larger error rates at vario...
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
Memory requirements of intellectual property components (IP) in contemporary multi-processor systems-on-chip are increasing. Large high-speed external memories, such as DDR2 SDRAM...