329 search results - page 22 / 66 » Dynamic techniques to reduce memory traffic in embedded syst... |
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper proposes a dynamic cache repartitioning technique that enhances compositionality on platforms executing media applications with multiple utilization scenarios. The repa...
AC
2005
Springer
13 years 7 months ago
2005
Springer
Reducing power consumption has become a major challenge in the design and operation of today's computer systems. This chapter describes different techniques addressing this c...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
Abstract— The memory subsystem is known to comprise a significant fraction of the power dissipation in embedded systems. The memory addressing strategy, which determines the seq...
MAM
2002
13 years 7 months ago
2002
Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines t...
RTAS
2005
IEEE
14 years 1 months ago
2005
IEEE
Dynamic voltage and frequency scaling is increasingly being used to reduce the energy requirements of embedded and real-time applications by exploiting idle CPU resources, while s...