303 search results - page 6 / 61 » Dynamic thermal management via architectural adaptation |
DAC
2010
ACM
13 years 7 months ago
2010
ACM
Many DTM schemes rely heavily on the accurate knowledge of the chip's dynamic thermal state to make optimal performance/ temperature trade-off decisions. This information is ...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
FPGA logic densities continue to increase at a tremendous rate. This has had the undesired consequence of increased power density, which manifests itself as higher ondie temperatu...
VLSID
2007
IEEE
14 years 7 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
With increasing speed and power density, high-performance memories, including FB-DIMM (Fully Buffered DIMM) and DDR2 DRAM, now begin to require dynamic thermal management (DTM) a...
MICRO
2005
IEEE
14 years 1 months ago
2005
IEEE
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...