234 search results - page 21 / 47 » Dynamically Reconfigurable Vision-Chip Architecture |
ERSA
2006
14 years 10 days ago
2006
: Traditional FPGA architectures can potentially allow the dynamic swap in and out of hardware tasks through 2D partial reconfiguration. A segmented bus structure is proposed to be...
ARC
2007
Springer
14 years 2 months ago
2007
Springer
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...
DAC
2005
ACM
14 years 27 days ago
2005
ACM
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
CC
2008
Springer
14 years 22 days ago
2008
Springer
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
IEEESCC
2009
IEEE
13 years 8 months ago
2009
IEEE
The Service Component Architecture (SCA) is a technology agnostic standard for developing and deploying distributed service-oriented applications. However, SCA does not define sta...