130 search results - page 22 / 26 » Dynamically Scheduling VLIW Instructions |
ASPLOS
2004
ACM
14 years 26 days ago
2004
ACM
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...
PPL
2006
13 years 7 months ago
2006
This paper analyses the micro-threaded model of concurrency making comparisons with both data and instruction-level concurrency. The model is fine grain and provides synchronisati...
ICS
2001
Tsinghua U.
13 years 12 months ago
2001
Tsinghua U.
The issue logic of dynamically scheduled superscalar processors is one of their most complex and power-consuming parts. In this paper we present alternative issue-logic designs th...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
The dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The d...
GLVLSI
1997
IEEE
13 years 11 months ago
1997
IEEE
Multi-dimensional systems containing nested loops are widely used to model scientific applications such as image processing, geophysical signal processing and fluid dynamics. Ho...