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ACMMSP
2005
ACM
101views Hardware» more  ACMMSP 2005»
14 years 1 months ago
Transparent pointer compression for linked data structures
64-bit address spaces are increasingly important for modern applications, but they come at a price: pointers use twice as much memory, reducing the effective cache capacity and m...
Chris Lattner, Vikram S. Adve
SENSYS
2004
ACM
14 years 1 months ago
The flooding time synchronization protocol
Wireless sensor network applications, similarly to other distributed systems, often require a scalable time synchronization service enabling data consistency and coordination. Thi...
Miklós Maróti, Branislav Kusy, Gyula...
IPPS
2003
IEEE
14 years 29 days ago
Multi-Paradigm Framework for Parallel Image Processing
A software framework for the parallel execution of sequential programs using C++ classes is presented. The functional language Concurrent ML is used to implement the underlying ha...
David J. Johnston, Martin Fleury, Andy C. Downton
ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
14 years 23 days ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
MOBICOM
2000
ACM
14 years 1 days ago
An end-to-end approach to host mobility
We present the design and implementation of an end-to-end architecture for Internet host mobility using dynamic updates to the Domain Name System (DNS) to track host location. Exi...
Alex C. Snoeren, Hari Balakrishnan
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