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» E*plore-ing the Simulation Design Space
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ICCD
2007
IEEE
139views Hardware» more  ICCD 2007»
14 years 4 months ago
Statistical simulation of chip multiprocessors running multi-program workloads
This paper explores statistical simulation as a fast simulation technique for driving chip multiprocessor (CMP) design space exploration. The idea of statistical simulation is to ...
Davy Genbrugge, Lieven Eeckhout
ISSS
1996
IEEE
143views Hardware» more  ISSS 1996»
13 years 11 months ago
DSP Processor/Compiler Co-Design: A Quantitative Approach
In the paper the problem of processor/compiler codesign for digital signal processing and embedded SYstems is discussed. The main principle we follow is the top-down approach char...
Vojin Zivojnovic, Stefan Pees, C. Schälger, M...
ICCAD
2001
IEEE
104views Hardware» more  ICCAD 2001»
14 years 4 months ago
A Symbolic Simulation-Based Methodology for Generating Black-Box Timing Models of Custom Macrocells
We present a methodology for generating black-box timing models for full-custom transistor-level CMOS circuits. Our approach utilizes transistor-level ternary symbolic timing simu...
Clayton B. McDonald, Randal E. Bryant
ISSS
2000
IEEE
94views Hardware» more  ISSS 2000»
13 years 12 months ago
A Transformational Approach to Constraint Relaxation of a Time-driven Simulation Model
Time-driven simulation models typically model timing in an idealized way that is over-constrained and cannot be directly implemented. In this paper we present a transformation to ...
Marek Jersak, Ying Cai, Dirk Ziegenbein, Rolf Erns...
MASCOTS
2010
13 years 9 months ago
Barra: A Parallel Functional Simulator for GPGPU
Abstract--We present Barra, a simulator of Graphics Processing Units (GPU) tuned for general purpose processing (GPGPU). It is based on the UNISIM framework and it simulates the na...
Sylvain Collange, Marc Daumas, David Defour, David...