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ICCD
2004
IEEE
120views Hardware» more  ICCD 2004»
15 years 11 months ago
XTalkDelay: A Crosstalk-Aware Timing Analysis Tool for Chip-Level Designs
This paper describes XTalkDelay, an industrial-strength methodology and tool for measuring the impact of crosstalk on delays of paths in a design. The main cornerstone of XTalkDel...
Yinghua Li, Rajeev Murgai, Takashi Miyoshi, Ashwin...
CEC
2007
IEEE
15 years 8 months ago
Evolving tiles for automated self-assembly design
Abstract— Self-assembly is a distributed, asynchronous mechanism that is pervasive across natural systems where hierarchical complex structures are built from the bottom-up. The ...
Germán Terrazas, Marian Gheorghe, Graham Ke...
139
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ATS
2003
IEEE
98views Hardware» more  ATS 2003»
15 years 7 months ago
Automatic Design Validation Framework for HDL Descriptions via RTL ATPG
We present a framework for high-level design validation using an efficient register-transfer level (RTL) automatic test pattern generator (ATPG). The RTL ATPG generates the test ...
Liang Zhang, Michael S. Hsiao, Indradeep Ghosh
SC
2003
ACM
15 years 7 months ago
BCS-MPI: A New Approach in the System Software Design for Large-Scale Parallel Computers
Buffered CoScheduled MPI (BCS-MPI) introduces a new approach to design the communication layer for largescale parallel machines. The emphasis of BCS-MPI is on the global coordinat...
Juan Fernández, Eitan Frachtenberg, Fabrizi...
ECTEL
2008
Springer
15 years 4 months ago
Issues in the Design of an Environment to Support the Learning of Mathematical Generalisation
Abstract. Expressing generality, recognising and analysing patterns and articulating structure is a complex task and one that is invariably problematic for students. Nonetheless, v...
Darren Pearce, Manolis Mavrikis, Eirini Geraniou, ...