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» ESP: A System Utilization Benchmark
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IWMM
2009
Springer
130views Hardware» more  IWMM 2009»
14 years 4 months ago
A component model of spatial locality
Good spatial locality alleviates both the latency and bandwidth problem of memory by boosting the effect of prefetching and improving the utilization of cache. However, convention...
Xiaoming Gu, Ian Christopher, Tongxin Bai, Chengli...
ASAP
2005
IEEE
133views Hardware» more  ASAP 2005»
14 years 3 months ago
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
CC
2008
Springer
172views System Software» more  CC 2008»
13 years 11 months ago
Efficient Context-Sensitive Shape Analysis with Graph Based Heap Models
The performance of heap analysis techniques has a significant impact on their utility in an optimizing compiler. Most shape analysis techniques perform interprocedural dataflow ana...
Mark Marron, Manuel V. Hermenegildo, Deepak Kapur,...
ISSRE
2010
IEEE
13 years 8 months ago
Pinpointing the Subsystems Responsible for the Performance Deviations in a Load Test
—Large scale systems (LSS) contain multiple subsystems that interact across multiple nodes in sometimes unforeseen and complicated ways. As a result, pinpointing the subsystems t...
Haroon Malik, Bram Adams, Ahmed E. Hassan
FPGA
2005
ACM
97views FPGA» more  FPGA 2005»
14 years 3 months ago
Techniques for synthesizing binaries to an advanced register/memory structure
Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...
Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid