Techniques for synthesizing binaries to an advanced register/memory structure

Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with minimal impact, porting existing binaries to FPGAs, and even dynamically synthesizing software kernels to faster FPGA coprocessors. Those works showed that standard binary decompilation methods can recover enough high-level control information to result in reasonably-efficient hardware. However, recent synthesis methods for FPGAs utilize advanced memory structures, such as a "smart buffer," that require recovery of additional high-level information, specifically information about loops and arrays. We incorporate decompilation techniques into an existing binary synthesis tool flow to recover loops and arrays in order to take advantage of advanced memory structures when performing synthesis from a binary. We demonstrate through experiments on six benchmarks that our methods improve binary synthesis per...

• Type: Conference
• Year: 2005
• Where: FPGA
• Authors: Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid
• Keywords: Advanced Memory Structures, Binary Synthesis, FPGA 2005, Hardware, Smart Buffers