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ARITH
2005
IEEE
13 years 10 months ago
Error-Free Computation of 8x8 2-D DCT and IDCT Using Two-Dimensional Algebraic Integer Quantization
This paper presents a novel error-free (infinite-precision) architecture for the fast implementation of both 2-D Discrete Cosine Transform and Inverse DCT. The architecture uses a...
Khan Wahid, Vassil S. Dimitrov, Graham A. Jullien
ASAP
2008
IEEE
96views Hardware» more  ASAP 2008»
14 years 3 months ago
Integer and floating-point constant multipliers for FPGAs
Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimi...
Nicolas Brisebarre, Florent de Dinechin, Jean-Mich...
FPL
2004
Springer
95views Hardware» more  FPL 2004»
14 years 1 months ago
Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor
Abstract. This paper proposes an architecture that combines a contextswitching virtual configware/software SAT solver with an embedded processor to promote a tighter coupling betwe...
C. J. Tavares, C. Bungardean, G. M. Matos, Jos&eac...
DATE
2003
IEEE
130views Hardware» more  DATE 2003»
14 years 1 months ago
A Technique for High Ratio LZW Compression
Reduction of both the test suite size and the download time of test vectors is important in today's System-On-a-Chip designs. In this paper, a method for compressing the scan...
Michael J. Knieser, Francis G. Wolff, Christos A. ...
MVA
1994
145views Computer Vision» more  MVA 1994»
13 years 9 months ago
Machine Vision Based Inspection of Textile Fabrics
Several issues on automatic inspection of textile fabrics are discussed in this paper. To avoid the intense computation for real time inspection, we suggest a parallel pyramid har...
Chuanjun Wang, Chih-Ho Yu