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GD
2009
Springer
14 years 1 months ago
On Planar Supports for Hypergraphs
A graph G is a support for a hypergraph H = (V, S) if the vertices of G correspond to the vertices of H such that for each hyperedge Si ∈ S the subgraph of G induced by Si is co...
Kevin Buchin, Marc J. van Kreveld, Henk Meijer, Be...
IPPS
1999
IEEE
14 years 27 days ago
The Recursive Grid Layout Scheme for VLSI Layout of Hierarchical Networks
We propose the recursive grid layout scheme for deriving efficient layouts of a variety of hierarchical networks and computing upper bounds on the VLSI area of general hierarchica...
Chi-Hsiang Yeh, Behrooz Parhami, Emmanouel A. Varv...
ICCAD
1997
IEEE
86views Hardware» more  ICCAD 1997»
14 years 24 days ago
Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems
- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This e...
Kyosun Kim, Ramesh Karri, Miodrag Potkonjak
ICC
2007
IEEE
150views Communications» more  ICC 2007»
14 years 14 days ago
ACE Spectrum of LDPC Codes and Generalized ACE Design
The construction of good, finite-length, LDPC codes is currently an attractive research area. Reducing attention to the Binary Erasure Channel (BEC), this problem translates into t...
Dejan Vukobratovic, Aleksandar Djurendic, Vojin Se...
AHS
2006
IEEE
188views Hardware» more  AHS 2006»
14 years 10 days ago
Finite State Machine IP Watermarking: A Tutorial
Sharing Intellectual Property (IP) blocks in today's competitive market poses significant high security risks. In this paper, we present a tutorial for a watermarking approach...
Amr T. Abdel-Hamid, Sofiène Tahar, El Mosta...