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ICCD
2000
IEEE
159views Hardware» more  ICCD 2000»
14 years 1 days ago
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
This paper aims to provide a quantitative understanding of the performance of DSP and multimedia applications on very long instruction word (VLIW), single instruction multiple dat...
Deependra Talla, Lizy Kurian John, Viktor S. Lapin...
ICS
2007
Tsinghua U.
14 years 1 months ago
Tradeoff between data-, instruction-, and thread-level parallelism in stream processors
This paper explores the scalability of the Stream Processor architecture along the instruction-, data-, and thread-level parallelism dimensions. We develop detailed VLSI-cost and ...
Jung Ho Ahn, Mattan Erez, William J. Dally
PLDI
2003
ACM
14 years 26 days ago
A compiler framework for speculative analysis and optimizations
Speculative execution, such as control speculation and data speculation, is an effective way to improve program performance. Using edge/path profile information or simple heuristi...
Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, ...
SP
2009
IEEE
144views Security Privacy» more  SP 2009»
14 years 2 months ago
Native Client: A Sandbox for Portable, Untrusted x86 Native Code
This paper describes the design, implementation and evaluation of Native Client, a sandbox for untrusted x86 native code. Native Client aims to give browser-based applications the...
Bennet Yee, David Sehr, Gregory Dardyk, J. Bradley...
VLSID
2009
IEEE
170views VLSI» more  VLSID 2009»
14 years 8 months ago
Code Transformations for TLB Power Reduction
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivasta...