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SLIP
2009
ACM
14 years 2 months ago
Integrated interlayer via planning and pin assignment for 3D ICs
As technology advances, 3D ICs are introduced for alleviating the interconnect problem coming with shrinking feature size and increasing integration density. In 3D ICs, one of the...
Xu He, Sheqin Dong, Xianlong Hong, Satoshi Goto
ASPDAC
2006
ACM
95views Hardware» more  ASPDAC 2006»
14 years 1 months ago
The design and implementation of a low-latency on-chip network
— Many of the issues that will be faced by the designers of multi-billion transistor chips may be alleviated by the presence of a flexible global communication infrastructure. I...
Robert D. Mullins, Andrew West, Simon W. Moore
SECON
2010
IEEE
13 years 5 months ago
Utility-Based Gateway Deployment for Supporting Multi-Domain DTNs
Abstract--Due to technology or policy constraints, communications across network domains usually require the intervention of gateways, and their proper deployment is crucial to the...
Ting He, Kang-Won Lee, Nikoletta Sofra, Kin K. Leu...
DAC
2005
ACM
13 years 9 months ago
Minimizing peak current via opposite-phase clock tree
Although a lot of research efforts have been made in the minimization of the total power consumption caused by the clock tree, no attention has been paid to the minimization of th...
Yow-Tyng Nieh, Shih-Hsu Huang, Sheng-Yu Hsu
MOBISYS
2009
ACM
14 years 8 months ago
Predictive methods for improved vehicular WiFi access
With the proliferation of WiFi technology, many WiFi networks are accessible from vehicles on the road making vehicular WiFi access realistic. However, several challenges exist: l...
Pralhad Deshpande, Anand Kashyap, Chul Sung, Samir...