Sciweavers

514 search results - page 11 / 103
» Efficient Algorithms for the Computational Design of Optimal...
Sort
View
CF
2004
ACM
14 years 2 months ago
Opportunities and challenges in application-tuned circuits and architectures based on nanodevices
Nanoelectronics research has primarily focused on devices. By contrast, not much has been published on innovations at higher layers: we know little about how to construct circuits...
Teng Wang, Zhenghua Qi, Csaba Andras Moritz
CC
2011
Springer
270views System Software» more  CC 2011»
13 years 5 days ago
Subregion Analysis and Bounds Check Elimination for High Level Arrays
For decades, the design and implementation of arrays in programming languages has reflected a natural tension between productivity and performance. Recently introduced HPCS langua...
Mackale Joyner, Zoran Budimlic, Vivek Sarkar

Lecture Notes
443views
15 years 6 months ago
Design and Analysis of Computer Algorithms
"This course will consist of a number of major sections. The first will be a short review of some preliminary material, including asymptotics, summations, and recurrences and ...
David M. Mount
DAC
2010
ACM
13 years 7 months ago
An error tolerance scheme for 3D CMOS imagers
A three-dimensional (3D) CMOS imager constructed by stacking a pixel array of backside illuminated sensors, an analog-to-digital converter (ADC) array, and an image signal process...
Hsiu-Ming Chang, Jiun-Lang Huang, Ding-Ming Kwai, ...
DFT
2009
IEEE
210views VLSI» more  DFT 2009»
13 years 12 months ago
Optimizing Parametric BIST Using Bio-inspired Computing Algorithms
Optimizing the BIST configuration based on the characteristics of the design under test is a complicated and challenging work for test engineers. Since this problem has multiple o...
Nastaran Nemati, Amirhossein Simjour, Amirali Ghof...