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BMCBI
2007
233views more  BMCBI 2007»
13 years 8 months ago
160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)
Background: To infer homology and subsequently gene function, the Smith-Waterman (SW) algorithm is used to find the optimal local alignment between two sequences. When searching s...
Isaac T. S. Li, Warren Shum, Kevin Truong
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
13 years 6 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
IPPS
1998
IEEE
14 years 25 days ago
Optimizing Data Scheduling on Processor-in-Memory Arrays
In the study of PetaFlop project, Processor-In-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. ...
Yi Tian, Edwin Hsing-Mean Sha, Chantana Chantrapor...
SMA
2010
ACM
171views Solid Modeling» more  SMA 2010»
13 years 8 months ago
Efficient simplex computation for fixture layout design
Designing a fixture layout of an object can be reduced to computing the largest simplex and the resulting simplex is classified using the radius of the largest inscribed ball cent...
Yu Zheng, Ming C. Lin, Dinesh Manocha
DCC
2009
IEEE
14 years 9 months ago
Linear Suffix Array Construction by Almost Pure Induced-Sorting
We present a linear time and space suffix array (SA) construction algorithm called the SA-IS algorithm. The SA-IS algorithm is novel because of the LMS-substrings used for the pro...
Ge Nong, Sen Zhang, Wai Hong Chan