Since the energy budget of mobile nodes is limited, the performance of a networking protocol for such users should be evaluated in terms of its energy efficiency, in addition to t...
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
During the last years, the use of string kernels that compare documents has been shown to achieve good results on text classification problems. In this paper we introduce the appl...
Understanding the relation between usability measures seems crucial to deepen our conception of usability and to select the right measures for usability studies. We present a meta...