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» Efficient Communication in a Design Environment
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CAL
2006
15 years 4 months ago
An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation
Multiple core designs have become commonplace in the processor market, and are hence a major focus in modern computer architecture research. Thus, for both product development and ...
James Donald, Margaret Martonosi
DAC
2009
ACM
16 years 5 months ago
Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications
Power consumption of system-level on-chip communications is becoming more significant in the overall system-on-chip (SoC) power as technology scales down. In this paper, we propos...
Renshen Wang, Nan-Chi Chou, Bill Salefski, Chung-K...
EUROPAR
2003
Springer
15 years 9 months ago
FOBS: A Lightweight Communication Protocol for Grid Computing
The advent of high-performance networks in conjunction with low-cost, powerful computational engines has made possible the development of a new set of technologies termed computat...
Phillip M. Dickens
CODES
2006
IEEE
15 years 10 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
AICT
2010
IEEE
240views Communications» more  AICT 2010»
14 years 8 months ago
Providing Security in 4G Systems: Unveiling the Challenges
— Several research groups are working on designing new security architectures for 4G networks such as Hokey and Y-Comm. Since designing an efficient security module requires a cl...
Mahdi Aiash, Glenford E. Mapp, Aboubaker Lasebae, ...