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» Efficient Design Error Correction of Digital Circuits
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IUI
2006
ACM
14 years 2 months ago
Three phase verification for spoken dialog clarification
Spoken dialog tasks incur many errors including speech recognition errors, understanding errors, and even dialog management errors. These errors create a big gap between user'...
Sangkeun Jung, Cheongjae Lee, Gary Geunbae Lee
APCSAC
2004
IEEE
14 years 15 days ago
A Compiler-Assisted On-Chip Assigned-Signature Control Flow Checking
As device sizes continue shrinking, lower charges are needed to activate gates, and consequently ever smaller external events (such as single ionizing particles of naturally occurr...
Xiaobin Li, Jean-Luc Gaudiot
ICCD
1996
IEEE
108views Hardware» more  ICCD 1996»
14 years 27 days ago
Module Generators for a Regular Analog Layout
In general, automatic layout composition techniques based on pre-designed devices facilitate the production of small IC numbers by prefabricating their basic structures. They also...
J. Kampe, C. Wisser, G. Scarbata
CASES
2003
ACM
14 years 12 days ago
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...
Sumit Mohanty, Viktor K. Prasanna
CHES
2006
Springer
205views Cryptology» more  CHES 2006»
14 years 13 days ago
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
Konrad J. Kulikowski, Alexander B. Smirnov, Alexan...