303 search results - page 45 / 61 » Efficient Design Error Correction of Digital Circuits |
ICDE
2005
IEEE
14 years 10 months ago
2005
IEEE
Although conventional database management systems are designed to tolerate hardware and to a lesser extent even software errors, they cannot protect themselves against syntactical...
DAC
2004
ACM
14 years 9 months ago
2004
ACM
Resolution enhancement techniques (RET) such as optical proximity correction (OPC) and phase-shift mask (PSM) technology are deployed in modern processes to increase the fidelity ...
FDTC
2006
Springer
14 years 11 days ago
2006
Springer
Abstract. Balanced gates are an effective countermeasure against power analysis attacks only if they can be guaranteed to maintain their power balance. Traditional testing and reli...
DAC
2004
ACM
14 years 9 months ago
2004
ACM
CT An efficient statistical timing analysis algorithm that can handle arbitrary (spatial and structural) causes of delay correlation is described. The algorithm derives the entire ...
VLSID
2007
IEEE
14 years 9 months ago
2007
IEEE
Crosstalk noise in the clock network of digital circuits is often detected late in the design cycle, sometimes as late as after first silicon. It is therefore necessary to fix cros...