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» Efficient Design Error Correction of Digital Circuits
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ICCD
2006
IEEE
138views Hardware» more  ICCD 2006»
14 years 4 months ago
Delay and Area Efficient First-level Cache Soft Error Detection and Correction
—Soft error rates are an increasing problem in modern VLSI circuits. Commonly used error correcting codes reduce soft error rates in large memories and second level caches but ar...
Karl Mohr, Lawrence Clark
DATE
1999
IEEE
129views Hardware» more  DATE 1999»
13 years 11 months ago
Battery-Powered Digital CMOS Design
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
Massoud Pedram, Qing Wu
29
Voted
ICICS
2003
Springer
14 years 21 days ago
A DWT-Based Digital Video Watermarking Scheme with Error Correcting Code
In this paper, a digital video watermarking algorithm is proposed. We present a novel DWT-based blind digital video watermarking scheme with scrambled watermark and error correctin...
Pat Pik-Wah Chan, Michael R. Lyu
ISCAS
2005
IEEE
129views Hardware» more  ISCAS 2005»
14 years 1 months ago
An analytical approach for soft error rate estimation in digital circuits
—Soft errors due to cosmic rays cause reliability problems during lifetime operation of digital systems, which increase exponentially with Moore’s law. The first step in develo...
Ghazanfar Asadi, Mehdi Baradaran Tahoori
DAC
2000
ACM
14 years 8 months ago
Efficient error detection, localization, and correction for FPGA-based debugging
John Lach, William H. Mangione-Smith, Miodrag Potk...