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» Efficient Design Validation Based on Cultural Algorithms
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189
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MOBIHOC
2005
ACM
16 years 3 months ago
Power balanced coverage-time optimization for clustered wireless sensor networks
We consider a wireless sensor network in which sensors are grouped into clusters, each with its own cluster head (CH). Each CH collects data from sensors in its cluster and relays...
Tao Shu, Marwan Krunz, Sarma B. K. Vrudhula
139
Voted
BMCBI
2010
147views more  BMCBI 2010»
15 years 3 months ago
Learning biological network using mutual information and conditional independence
Background: Biological networks offer us a new way to investigate the interactions among different components and address the biological system as a whole. In this paper, a revers...
Dong-Chul Kim, Xiaoyu Wang, Chin-Rang Yang, Jean G...
120
Voted
DATE
2008
IEEE
107views Hardware» more  DATE 2008»
15 years 10 months ago
Instruction Set Extension Exploration in Multiple-Issue Architecture
To satisfy high-performance computing demand in modern embedded devices, current embedded processor architectures provide designer with possibility either to define customized ins...
I-Wei Wu, Zhi-Yuan Chen, Jean Jyh-Jiun Shann, Chun...
163
Voted
ECOOP
1998
Springer
15 years 8 months ago
Cyclic Distributed Garbage Collection with Group Merger
This paper presents a new algorithm for distributed garbage collection and outlines its implementation within the Network Objects system. The algorithm is based on a reference list...
Helena Rodrigues, Richard E. Jones
128
Voted
ISPD
2009
ACM
79views Hardware» more  ISPD 2009»
15 years 10 months ago
A routing approach to reduce glitches in low power FPGAs
Glitches (spurious transitions) are common in electronic circuits. In this paper we present a novel approach to reduce dynamic power in FPGAs by reducing glitches during the routi...
Quang Dinh, Deming Chen, Martin D. F. Wong