14515 search results - page 54 / 2903 » Efficient Embedded Computing |
DATE
1997
IEEE
14 years 2 months ago
1997
IEEE
ATS
2004
IEEE
14 years 1 months ago
2004
IEEE
Conventional serial connection of internal scan chains brings the power and time penalty. A novel parallel core wrapper design (pCWD) approach is presented in this paper for reduc...
DATE
2004
IEEE
14 years 1 months ago
2004
IEEE
This paper proposes a low-energy solution for CAMbased highly associative I-caches using a segmented wordline and a predictor-based instruction fetch mechanism. Not all instructio...
FPGA
2006
ACM
14 years 1 months ago
2006
ACM
Abstract-- Increasing device densities allow chip manufacturers to integrate more functionality onto a single piece of silicon. FPGA manufacturers, such as Xilinx and Altera, use t...
CSREAESA
2006
13 years 11 months ago
2006
The performance of software executed on a microprocessor is adversely affected by the basic fetchexecute cycle. A further performance penalty results from the load-execute-store p...