Sciweavers

283 search results - page 14 / 57
» Efficient FPGA hardware development: A multi-language approa...
Sort
View
DAC
2000
ACM
14 years 2 days ago
Using general-purpose programming languages for FPGA design
ct General-purpose programming languages (GPL) are effective vehicles for FPGA design because they are easy to use, extensible, widely available, and can be used to describe both t...
Brad L. Hutchings, Brent E. Nelson
FCCM
2004
IEEE
103views VLSI» more  FCCM 2004»
13 years 11 months ago
A Dynamically-Reconfigurable, Power-Efficient Turbo Decoder
The development of turbo codes has allowed for nearShannon limit information transfer in modern communication systems. Although turbo decoding is viewed as superior to alternate d...
Jian Liang, Russell Tessier, Dennis Goeckel
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
14 years 2 months ago
Low-power warp processor for power efficient high-performance embedded systems
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
Roman L. Lysecky
ASPDAC
2009
ACM
115views Hardware» more  ASPDAC 2009»
14 years 2 months ago
Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform
— Multiprocessors on a chip are the reality of these days. Semiconductor industry has recognized this approach as the most efficient in order to exploit chip resources, but the ...
Antonino Tumeo, Marco Branca, Lorenzo Camerini, Ma...
FCCM
2009
IEEE
134views VLSI» more  FCCM 2009»
13 years 11 months ago
Efficient Mapping of Hardware Tasks on Reconfigurable Computers Using Libraries of Architecture Variants
Scheduling and partitioning of task graphs on reconfigurable hardware needs to be carefully carried out in order to achieve the best possible performance. In this paper, we demons...
Miaoqing Huang, Vikram K. Narayana, Tarek A. El-Gh...