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ICCAD
1998
IEEE
76views Hardware» more  ICCAD 1998»
13 years 12 months ago
Functional debugging of systems-on-chip
Due to the exponential growth of both design complexity and the number of gates per pin, functional debugging has emerged as a critical step in the development of a system-on-chip...
Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra
EENERGY
2010
13 years 11 months ago
Statistical static capacity management in virtualized data centers supporting fine grained QoS specification
From an ecological but also from an economical and in the meantime a technical view the fast ongoing increase of power consumption in today’s data centers is no longer feasible....
Marko Hoyer, Kiril Schröder, Wolfgang Nebel
ICSE
2009
IEEE-ACM
13 years 5 months ago
Extended eTVRA vs. security checklist: Experiences in a value-web
Abstract--Security evaluation according to ISO 15408 (Common Criteria) is a resource and time demanding activity, as well as being costly. For this reason, only few companies take ...
Ayse Morali, Emmanuele Zambon, Siv Hilde Houmb, Ka...

Publication
248views
13 years 4 months ago
Equalizer: A Scalable Parallel Rendering Framework
Continuing improvements in CPU and GPU performances as well as increasing multi-core processor and cluster-based parallelism demand for flexible and scalable parallel rendering sol...
Stefan Eilemann, Maxim Makhinya, Renato Pajarola
ISQED
2007
IEEE
109views Hardware» more  ISQED 2007»
14 years 1 months ago
Virtual Channels Planning for Networks-on-Chip
The virtual channel flow control (VCFC) provides an efficient implementation for on-chip networks. However, allocating the virtual channels (VCs) uniformly results in a waste of a...
Ting-Chun Huang, Ümit Y. Ogras, Radu Marcules...