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TACO
2008
130views more  TACO 2008»
13 years 7 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt
FPL
2006
Springer
147views Hardware» more  FPL 2006»
13 years 11 months ago
Efficient Automated Synthesis, Programing, and Implementation of Multi-Processor Platforms on FPGA Chips
Emerging embedded System-on-Chip (SoC) platforms are increasingly becoming multiprocessor architectures. The advances in the FPGA chip technology make the implementation of such a...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
ARC
2007
Springer
140views Hardware» more  ARC 2007»
13 years 11 months ago
Reconfigurable Computing for Accelerating Protein Folding Simulations
Abstract. This paper presents a methodology for the design of a reconfigurable computing system applied to a complex problem in molecular Biology: the protein folding problem. An e...
Nilton B. Armstrong, Heitor S. Lopes, Carlos R. Er...
ERSA
2004
129views Hardware» more  ERSA 2004»
13 years 9 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna
ICCD
2003
IEEE
123views Hardware» more  ICCD 2003»
14 years 4 months ago
Simplifying SoC design with the Customizable Control Processor Platform
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
C. Ross Ogilvie, Richard Ray, Robert Devins, Mark ...