283 search results - page 8 / 57 » Efficient FPGA hardware development: A multi-language approa... |
FPL
2008
Springer
13 years 10 months ago
2008
Springer
This paper describes an analytical model, based principally on Rent's Rule, that relates logic architectural parameters to the area efficiency of an FPGA. In particular, the ...
FPL
2006
Springer
14 years 14 days ago
2006
Springer
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
IPPS
2003
IEEE
14 years 2 months ago
2003
IEEE
Reconfigurable hardware resources are very expensive, and yet can be underutilized. This paper describes a middleware capable of discovering underutilized computing nodes with FPG...
TC
2010
13 years 7 months ago
2010
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
CHES
2006
Springer
14 years 16 days ago
2006
Springer
Abstract. Many Field-Programmable Gate Array (FPGA) based systems utilize third-party intellectual property (IP) in their development. When they are deployed in non-networked envir...