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» Efficient Hardware Architecture for Fast IP Address Lookup
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DATE
2006
IEEE
102views Hardware» more  DATE 2006»
14 years 1 months ago
A systematic IP and bus subsystem modeling for platform-based system design
The topic on platform-based system modeling has received a great deal of attention today. One of the important tasks that significantly affect the effectiveness and efficiency of ...
Junhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-...
HPCA
2011
IEEE
12 years 10 months ago
A new server I/O architecture for high speed networks
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
Guangdeng Liao, Xia Znu, Laxmi N. Bhuyan
DATE
2007
IEEE
88views Hardware» more  DATE 2007»
14 years 1 months ago
Improve CAM power efficiency using decoupled match line scheme
Content addressable memory (CAM) is widely used in many applications that require fast table lookup. Due to the parallel comparison feature and high frequency of lookup, however, ...
Yen-Jen Chang, Yuan-Hong Liao, Shanq-Jang Ruan
ANCS
2009
ACM
13 years 4 months ago
Progressive hashing for packet processing using set associative memory
As the Internet grows, both the number of rules in packet filtering databases and the number of prefixes in IP lookup tables inside the router are growing. The packet processing e...
Michel Hanna, Socrates Demetriades, Sangyeun Cho, ...
GLOBECOM
2007
IEEE
14 years 1 months ago
Efficient TCAM Encoding Schemes for Packet Classification Using Gray Code
—Packet classification is an enabling function in Internet routers for a variety of Internet applications. In order to classify Internet packets into flows, Internet routers must...
Yeim-Kuan Chang, Cheng-Chien Su