286 search results - page 17 / 58 » Efficient Hardware Architectures for Modular Multiplication ... |
FPL
2000
Springer
13 years 11 months ago
2000
Springer
This paper describes a novel resource binding technique for use in multiple-wordlength systems implemented in FPGAs. It is demonstrated that the multiple-wordlength binding problem...
SIGCOMM
2009
ACM
14 years 2 months ago
2009
ACM
This paper presents BCube, a new network architecture specifically designed for shipping-container based, modular data centers. At the core of the BCube architecture is its serve...
RSP
2003
IEEE
14 years 24 days ago
2003
IEEE
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...
APCCAS
2006
IEEE
13 years 9 months ago
2006
IEEE
Abstract-- Multi-context FPGAs (MC-FPGAs) have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. The additional memory pl...
FPL
2010
Springer
13 years 5 months ago
2010
Springer
A Multivariate Gaussian random number generator (MVGRNG) is an essential block for many hardware designs, including Monte Carlo simulations. These simulations are usually used in a...