286 search results - page 29 / 58 » Efficient Hardware Architectures for Modular Multiplication ... |
ISCA
1992
IEEE
13 years 11 months ago
1992
IEEE
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
ASAP
2008
IEEE
13 years 9 months ago
2008
IEEE
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
To satisfy high-performance computing demand in modern embedded devices, current embedded processor architectures provide designer with possibility either to define customized ins...
DATE
2003
IEEE
14 years 27 days ago
2003
IEEE
In this paper we present an hardware implementation of the RSA algorithm for public-key cryptography. The RSA algorithm consists in the computation of modular exponentials on larg...
TC
2008
13 years 7 months ago
2008
RFID (Radio Frequency IDentification) tags need to include security functions, yet at the same time their resources are extremely limited. Moreover, to provide privacy, authenticat...