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ASAP
2000
IEEE
90views Hardware» more  ASAP 2000»
13 years 12 months ago
Subword Permutation Instructions for Two-Dimensional Multimedia Processing in MicroSIMD Architectures
MicroSIMD architectures incorporating subword parallelism are very efficient for application-specific media processors as well as for fast multimedia information processing in gen...
Ruby B. Lee
VISUALIZATION
1996
IEEE
13 years 11 months ago
Hierarchical and Parallelizable Direct Volume Rendering for Irregular and Multiple Grids
A general volume rendering technique is described that efficiently produces images of excellent quality from data defined over irregular grids having a wide variety of formats. Re...
Jane Wilhelms, Allen Van Gelder, Paul Tarantino, J...
ERSA
2010
172views Hardware» more  ERSA 2010»
13 years 5 months ago
A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics
Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
Heiner Giefers, Marco Platzner
JCP
2007
154views more  JCP 2007»
13 years 7 months ago
Partially Reconfigurable Vector Processor for Embedded Applications
—Embedded systems normally involve a combination of hardware and software resources designed to perform dedicated tasks. Such systems have widely crept into industrial control, a...
Muhammad Z. Hasan, Sotirios G. Ziavras
ISMVL
2008
IEEE
148views Hardware» more  ISMVL 2008»
14 years 1 months ago
Quantum Logic Implementation of Unary Arithmetic Operations
The mathematical property of inheritance for certain unary fixed point operations has recently been exploited to enable the efficient formulation of arithmetic algorithms and circ...
Mitchell A. Thornton, David W. Matula, Laura Spenn...