286 search results - page 45 / 58 » Efficient Hardware Architectures for Modular Multiplication ... |
ERSA
2008
13 years 9 months ago
2008
This paper presents a novel architecture to increase the hardware utilization in multi-context field programmable gate arrays (MC-FPGAs). Conventional MC-FPGAs use dedicated tracks...
EUROPAR
2009
Springer
13 years 11 months ago
2009
Springer
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
FPGA
2006
ACM
13 years 11 months ago
2006
ACM
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...
DFT
2003
IEEE
14 years 25 days ago
2003
IEEE
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...
ASAP
2006
IEEE
14 years 1 months ago
2006
IEEE
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...