Sciweavers

2620 search results - page 366 / 524
» Efficient Hardware Voxelization
Sort
View
DATE
2004
IEEE
120views Hardware» more  DATE 2004»
15 years 8 months ago
Pattern Selection for Testing of Deep Sub-Micron Timing Defects
Due to process variations in deep sub-micron (DSM) technologies, the effects of timing defects are difficult to capture. This paper presents a novel coverage metric for estimating...
Mango Chia-Tso Chao, Li-C. Wang, Kwang-Ting Cheng
CAV
2006
Springer
132views Hardware» more  CAV 2006»
15 years 8 months ago
Symmetry Reduction for Probabilistic Model Checking
We present an approach for applying symmetry reduction techniques to probabilistic model checking, a formal verification method for the quantitative analysis of systems with stocha...
Marta Z. Kwiatkowska, Gethin Norman, David Parker
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 8 months ago
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
For successful SoC design, efficient and scalable communication architecture is crucial. Some bus interconnects now provide configurable structures to meet this requirement of an ...
Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-...
DATE
2004
IEEE
123views Hardware» more  DATE 2004»
15 years 8 months ago
Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies
We propose an algorithm for efficient threshold network synthesis of arbitrary multi-output Boolean functions. The main purpose of this work is to bridge the wide gap that currentl...
Rui Zhang, Pallav Gupta, Lin Zhong, Niraj K. Jha
165
Voted
EH
2004
IEEE
117views Hardware» more  EH 2004»
15 years 8 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...