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FPL
2006
Springer
161views Hardware» more  FPL 2006»
15 years 8 months ago
Predictive Load Balancing for Interconnected FPGAs
A Field Programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism...
Jason D. Bakos, Charles L. Cathey, Allen Michalski
FPL
2006
Springer
127views Hardware» more  FPL 2006»
15 years 8 months ago
On-FPGA Communication Architectures and Design Factors
The recent development of Platform-FPGA or FieldProgrammable System-on-Chip architectures, with immersed coarse-grain processors, embedded memories and IP cores, offers the potent...
Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. C...
FPL
2006
Springer
96views Hardware» more  FPL 2006»
15 years 8 months ago
Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding
Interconnect delays are becoming an increasingly significant part of the critical path delay for circuits implemented in FPGAs. Pipelined interconnects have been proposed to addre...
Allan Carroll, Carl Ebeling
CLUSTER
2001
IEEE
15 years 8 months ago
Numerically-Intensive "Plug-and-Play" Parallel Computing
At UCLA's Plasma Physics Group, we have been successful in building and using a numerically-intensive parallel computing cluster using Power Macintosh hardware and the Macint...
Dean E. Dauger, Viktor K. Decyk
ASPDAC
2000
ACM
109views Hardware» more  ASPDAC 2000»
15 years 8 months ago
A technique for QoS-based system partitioning
Quality of service (QoS) has been an important topic of many research communities. Combined with an advanced and retargetable compiler, variability of applicationsspecific very lar...
Johnson S. Kin, Chunho Lee, William H. Mangione-Sm...