31 search results - page 3 / 7 » Efficient Hardware for Antialiasing Coverage Mask Generation |
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Functional verification is widely acknowledged as the bottleneck in the hardware design cycle. This paper addresses one of the main challenges of simulation based verification (or...
ET
1998
13 years 6 months ago
1998
This paper explores the design of efficient test sets and test-pattern generators for online BIST. The target applications are high-performance, scalable datapath circuits for whi...
TVLSI
2008
13 years 6 months ago
2008
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
DSD
2004
IEEE
13 years 10 months ago
2004
IEEE
This paper describes principles of a novel two-level multi-output Boolean minimizer FC-Min, namely its Find Coverage phase. The problem of Boolean minimization is approached in a ...
DSD
2005
IEEE
13 years 9 months ago
2005
IEEE
Several methods improving the fault coverage in mixed-mode BIST are presented in this paper. The test is divided into two phases: the pseudo-random and deterministic. Maximum of f...