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POPL
2010
ACM
16 years 2 hour ago
A simple, verified validator for software pipelining
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...
Jean-Baptiste Tristan, Xavier Leroy
121
Voted
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
15 years 7 months ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli
LPNMR
1993
Springer
15 years 6 months ago
Negation as Partial Failure
We present a logic programming language which uses a four-valued bilattice as the underlying framework for semantics of programs. The two orderings of the bilattice reflect the c...
Bamshad Mobasher, Jacek Leszczylowski, Don Pigozzi
ENTCS
2008
100views more  ENTCS 2008»
15 years 2 months ago
Model-based Engineering of Embedded Systems Using the Hybrid Process Algebra Chi
Hybrid Chi is a process algebra for the modeling and analysis of hybrid systems. It enables modular specification of hybrid systems by means of a large set of atomic statements an...
Jos C. M. Baeten, Dirk A. van Beek, Pieter J. L. C...
122
Voted
AC
2003
Springer
15 years 7 months ago
Synthesis of Asynchronous Hardware from Petri Nets
Abstract. As semiconductor technology strides towards billions of transistors on a single die, problems concerned with deep sub-micron process features and design productivity call...
Josep Carmona, Jordi Cortadella, Victor Khomenko, ...