96 search results - page 4 / 20 » Efficient Mapping of Addition Recurrence Algorithms in CMOS |
ICCAD
1999
IEEE
13 years 11 months ago
1999
IEEE
Domino logic is a high-performance circuit configuration that is usually embedded in static logic environment and tightly coupled with the clocking scheme. In this paper, the timi...
ISCAS
2003
IEEE
13 years 12 months ago
2003
IEEE
A new vision chip, SCAMP-2, has been developed in a 0.35µm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architectu...
ICC
2007
IEEE
14 years 1 months ago
2007
IEEE
–Retransmission based schemes are not suitable for energy constrained wireless sensor networks. Hence, there is an interest in including parity bits in each packet for error cont...
SNPD
2008
13 years 8 months ago
2008
As processing power becomes cheaper and more available in cluster of computers, the need for parallel algorithm that can harness this computing potentials will increase. One applic...
NPL
2000
13 years 6 months ago
2000
Generative topographic mapping (GTM) is a statistical model to extract a hidden smooth manifold from data, like the self-organizing map (SOM). Although a deterministic search algo...