279 search results - page 25 / 56 » Efficient Power Co-Estimation Techniques for System-on-Chip ... |
TCAD
2002
13 years 8 months ago
2002
Specialized clustered very large instruction word (VLIW) processors combined with effective compilation techniques enable aggressive exploitation of the high instruction-level para...
EMSOFT
2004
Springer
14 years 1 months ago
2004
Springer
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
ISCA
2012
IEEE
11 years 11 months ago
2012
IEEE
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
VLSID
2007
IEEE
14 years 9 months ago
2007
IEEE
Leakage power is becoming a dominant contributor to the total power consumption and dual-Vth assignment is an efficient technique to decrease leakage power, for which effective de...
ICCD
2006
IEEE
14 years 5 months ago
2006
IEEE
-- Power-gating is a technique for efficiently reducing leakage power by shutting off the idle blocks. However, the presence of power-gating may also introduce negative effects on ...