279 search results - page 30 / 56 » Efficient Power Co-Estimation Techniques for System-on-Chip ... |
IPPS
2010
IEEE
13 years 6 months ago
2010
IEEE
Local search (LS) algorithms are among the most powerful techniques for solving computationally hard problems in combinatorial optimization. These algorithms could be viewed as &q...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Traditional code optimizers have produced significant performance improvements over the past forty years. While promising avenues of research still exist, traditional static and p...
SLIP
2009
ACM
14 years 3 months ago
2009
ACM
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...
MSWIM
2009
ACM
14 years 3 months ago
2009
ACM
The provision of rich multimedia services, such as Mobile TV, is considered of key importance for the Long Term Evolution (LTE) proliferation in mobile market. To this direction, ...