19 search results - page 1 / 4 » Efficient Sorting Using Registers and Caches |
WAE
2000
13 years 9 months ago
2000
ICSEA
2007
IEEE
14 years 2 months ago
2007
IEEE
— This paper demonstrates that the algorithmic performance of end user programs may be greatly affected by the two or three level caching scheme of the processor, and we introduc...
MSO
2003
13 years 9 months ago
2003
The use of sub-optimal digital systems can at times lead to high speed, efficient, costeffective structures that are sufficient to perform needed tasks. We describe here a system ...
DASFAA
2004
IEEE
13 years 11 months ago
2004
IEEE
Abstract. Certain types of database-backed web sites heavily utilize userdefined functions in SQL queries. Unfortunately, existing web proxy caching schemes can not handle these fu...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
—Soft error rates are an increasing problem in modern VLSI circuits. Commonly used error correcting codes reduce soft error rates in large memories and second level caches but ar...