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DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
14 years 1 months ago
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
1-The increasing cost for System-on-Chip (SOC) testing is mainly due to the huge test data volumes that lead to long test application time and require large automatic test equipmen...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
DFT
2002
IEEE
117views VLSI» more  DFT 2002»
14 years 13 days ago
Fast and Energy-Frugal Deterministic Test Through Test Vector Correlation Exploitation
Conversion of the flip-flops of the circuit into scan cells helps ease the test challenge; yet test application time is increased as serial shift operations are employed. Furthe...
Ozgur Sinanoglu, Alex Orailoglu
DFT
2002
IEEE
128views VLSI» more  DFT 2002»
14 years 13 days ago
Matrix-Based Test Vector Decompression Using an Embedded Processor
This paper describes a new compression/decompression methodology for using an embedded processor to test the other components of a system-on-a-chip (SoC). The deterministic test v...
Kedarnath J. Balakrishnan, Nur A. Touba
ISPAN
1997
IEEE
13 years 11 months ago
A Parallel Pipelined Renderer for Time-Varying Volume Data
This paper presents a strategy for efficiently rendering time-varying volume data on a distributed-memory parallel computer. Visualizing time-varying volume data take both large s...
Tzi-cker Chiueh, Kwan-Liu Ma
ICCD
2003
IEEE
145views Hardware» more  ICCD 2003»
14 years 4 months ago
Care Bit Density and Test Cube Clusters: Multi-Level Compression Opportunities
: Most of the recently discussed and commercially introduced test stimulus data compression techniques are based on low care bit densities found in typical scan test vectors. Data ...
Bernd Könemann