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ITC
2000
IEEE
80views Hardware» more  ITC 2000»
14 years 2 months ago
A stand-alone integrated test core for time and frequency domain measurements
An area efficient and robust integrated test core for mixed-signal circuits is described. The core consists of a completely digital implementation, except for a simple reconstructi...
Mohamed Hafed, Nazmy Abaskharoun, Gordon W. Robert...
EURODAC
1990
IEEE
92views VHDL» more  EURODAC 1990»
14 years 2 months ago
Accelerated test pattern generation by cone-oriented circuit partitioning
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...
Torsten Grüning, Udo Mahlstedt, Wilfried Daeh...
PTS
2008
98views Hardware» more  PTS 2008»
13 years 11 months ago
Modular System Verification by Inference, Testing and Reachability Analysis
Verification of a modular system composed of communicating components is a difficult problem, especially when the models of the components are not available. Conventional testing t...
Roland Groz, Keqin Li 0002, Alexandre Petrenko, Mu...
ET
2002
97views more  ET 2002»
13 years 9 months ago
Test Generation for Crosstalk-Induced Faults: Framework and Computational Results
Due to technology scaling and increasing clock frequency, problems due to noise effects lead to an increase in design/debugging efforts and a decrease in circuit performance. This...
Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer
JMLR
2010
101views more  JMLR 2010»
13 years 4 months ago
Efficient Reductions for Imitation Learning
Imitation Learning, while applied successfully on many large real-world problems, is typically addressed as a standard supervised learning problem, where it is assumed the trainin...
Stéphane Ross, Drew Bagnell