438 search results - page 6 / 88 » Efficient Timing Analysis Algorithms for Timed State Space E... |
RTCSA
2000
IEEE
13 years 11 months ago
2000
IEEE
A space efficient wait-free algorithm for implementing a shared buffer for real-time multiprocessor systems is presented in this paper. The commonly used method to implement share...
DATE
2003
IEEE
14 years 28 days ago
2003
IEEE
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
VLSID
1999
IEEE
13 years 12 months ago
1999
IEEE
The design and synthesis of asynchronous circuits is gaining importance in both the industrial and academic worlds. Timed circuits are a class of asynchronous circuits that incorp...
CODES
2003
IEEE
14 years 28 days ago
2003
IEEE
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
ISSTA
1998
ACM
13 years 11 months ago
1998
ACM
We present various techniques for improving the time and space efficiency of symbolic model checking for system requirements specified as synchronous finite state machines. We use...