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DATE
1999
IEEE
147views Hardware» more  DATE 1999»
13 years 11 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
COCOON
2007
Springer
13 years 11 months ago
Efficient Testing of Forecasts
Each day a weather forecaster predicts a probability of each type of weather for the next day. After n days, all the predicted probabilities and the real weather data are sent to a...
Ching-Lueh Chang, Yuh-Dauh Lyuu
DFT
2004
IEEE
94views VLSI» more  DFT 2004»
13 years 11 months ago
Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes
This paper addresses the problem of test response compaction. In order to maximize compaction ratio, a single-output encoder based on check matrix of a (n, n1, m, 3) convolutional...
Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman ...
ICGA
2006
312views Optimization» more  ICGA 2006»
15 years 7 months ago
New Approximate Strategies for Playing Sum Games based on Subgame Types
In this work we investigate the potential of combining AI tree-search algorithms with the algorithms of combinatorial game theory to provide more efficient strategies for playing s...
Manal Zaky, Cherif Salama, Salma Ghoneim
DATE
2008
IEEE
126views Hardware» more  DATE 2008»
13 years 9 months ago
State Skip LFSRs: Bridging the Gap between Test Data Compression and Test Set Embedding for IP Cores
1 We present a new type of Linear Feedback Shift Registers, State Skip LFSRs. State Skip LFSRs are normal LFSRs with the addition of a small linear circuit, the State Skip circuit,...
V. Tenentes, Xrysovalantis Kavousianos, Emmanouil ...