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APCSAC
2006
IEEE
14 years 1 months ago
Reliable Systolic Computing Through Redundancy
The systolic array paradigm has low communication demand because it does not use costly global communication and each processor communicates with few other processors. It is thus s...
Kunio Okuda, Siang Wun Song, Marcos Tatsuo Yamamot...
CF
2009
ACM
14 years 2 months ago
Quantitative analysis of sequence alignment applications on multiprocessor architectures
The exponential growth of databases that contains biological information (such as protein and DNA data) demands great efforts to improve the performance of computational platforms...
Friman Sánchez, Alex Ramírez, Mateo ...
JEC
2006
88views more  JEC 2006»
13 years 7 months ago
Synchroscalar: Evaluation of an embedded, multi-core architecture for media applications
We present an overview of the Synchroscalar single-chip, multi-core processor. Through the design of Synchroscalar, we find that high energy efficiency and low complexity can be a...
John Oliver, Ravishankar Rao, Diana Franklin, Fred...
VIS
2007
IEEE
149views Visualization» more  VIS 2007»
14 years 9 months ago
Time Dependent Processing in a Parallel Pipeline Architecture
Pipeline architectures provide a versatile and efficient mechanism for constructing visualizations, and they have been implemented in numerous libraries and applications over the p...
John Biddiscombe, Berk Geveci, Ken Martin, Kenn...
DELOS
2000
13 years 9 months ago
SMP and Cluster Architectures for Retrieval of Images in Digital Libraries
: This paper presents an overview over parallel architectures for the efficient realisation of digital libraries by considering image databases as an example. The state of the art ...
Odej Kao