222 search results - page 44 / 45 » Efficient assertion based verification using TLM |
ICCD
2003
IEEE
14 years 6 months ago
2003
IEEE
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
EMSOFT
2006
Springer
14 years 1 months ago
2006
Springer
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
IJCAI
2003
13 years 11 months ago
2003
We overview the development of first-order automated reasoning systems starting from their early years. Based on the analysis of current and potential applications of such systems...
WWW
2004
ACM
14 years 10 months ago
2004
ACM
This paper presents the design and user evaluation of SmartBack, a feature that complements the standard Back button by enabling users to jump directly to key pages in their navig...
ICCAD
2001
IEEE
14 years 6 months ago
2001
IEEE
The increasing popularity of SAT and BDD techniques in verification and synthesis encourages the search for additional speed-ups. Since typical SAT and BDD algorithms are exponent...