555 search results - page 97 / 111 » Efficient event-driven simulation of parallel processor arch... |
HPCA
2000
IEEE
14 years 2 hour ago
2000
IEEE
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
ISCA
1994
IEEE
13 years 11 months ago
1994
IEEE
This paper evaluates the tradeoffs involved in the design of the software-extended memory system of Alewife, a multiprocessor architecturethat implements coherentsharedmemorythrou...
SIAMCOMP
2000
13 years 7 months ago
2000
This paper describes a scheme to implement a shared address space of size m on an n-node mesh, with m polynomial in n, where each mesh node hosts a processor and a memory module. A...
FPGA
2007
ACM
14 years 1 months ago
2007
ACM
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
DAC
2010
ACM
2010
ACM
A probabilistic and energy-efficient scheduling approach for online application in real-time systems
13 years 11 months ago
This work considers the problem of minimizing the power consumption for real-time scheduling on processors with discrete operating modes. We provide a model for determining the ex...